\hypertarget{bootmii__ppc_8h}{
\section{libbroadway/include/broadway/bootmii\_\-ppc.h File Reference}
\label{bootmii__ppc_8h}\index{libbroadway/include/broadway/bootmii\_\-ppc.h@{libbroadway/include/broadway/bootmii\_\-ppc.h}}
}
{\ttfamily \#include $<$types.h$>$}\par
{\ttfamily \#include $<$broadway/hollywood.h$>$}\par
\subsection*{Defines}
\begin{DoxyCompactItemize}
\item 
\#define \hyperlink{bootmii__ppc_8h_ac86d7bbf6141f9d7d6632d260a2ed64d}{SPR\_\-XER}~(   1)
\item 
\#define \hyperlink{bootmii__ppc_8h_a10bf9d4046b46400ba8aa504ad7aa871}{SPR\_\-LR}~(   8)
\item 
\#define \hyperlink{bootmii__ppc_8h_a6d7d2d46fe4e0941bfab8a564d9f2566}{SPR\_\-CTR}~(   9)
\item 
\#define \hyperlink{bootmii__ppc_8h_a527a5a627634c14e323477261c7ef331}{SPR\_\-DSISR}~(  18)
\item 
\#define \hyperlink{bootmii__ppc_8h_a964470f48d20463ccf068ead18685bf1}{SPR\_\-DAR}~(  19)
\item 
\#define \hyperlink{bootmii__ppc_8h_af34fb74c3d2b383fe13de8bbc1c33848}{SPR\_\-DEC}~(  22)
\item 
\#define \hyperlink{bootmii__ppc_8h_a64587e05c3cb39548ea847bdada55185}{SPR\_\-SDR1}~(  25)
\item 
\#define \hyperlink{bootmii__ppc_8h_a1c57abb6957f8fd75ba94c8207f04598}{SPR\_\-SRR0}~(  26)
\item 
\#define \hyperlink{bootmii__ppc_8h_a9ee4c5d5e9f008dbf134e83da290822c}{SPR\_\-SRR1}~(  27)
\item 
\#define \hyperlink{bootmii__ppc_8h_a3a37b0e6f0780ef16c808f289b0ee327}{SPR\_\-SPRG0}~( 272)
\item 
\#define \hyperlink{bootmii__ppc_8h_ab09d01f2ff163655bf4bc0dbfa1d3b57}{SPR\_\-SPRG1}~( 273)
\item 
\#define \hyperlink{bootmii__ppc_8h_a2ee8d624883e3d16596982a65993281b}{SPR\_\-SPRG2}~( 274)
\item 
\#define \hyperlink{bootmii__ppc_8h_ac6c12814914d9f2568a221ff7b6db9fc}{SPR\_\-SPRG3}~( 275)
\item 
\#define \hyperlink{bootmii__ppc_8h_a39106933d6f7bdbca6823ac34317eef9}{SPR\_\-EAR}~( 282)
\item 
\#define \hyperlink{bootmii__ppc_8h_a912adaaf5ab1a3522222100703a3af79}{SPR\_\-PVR}~( 287)
\item 
\#define \hyperlink{bootmii__ppc_8h_a5ca31be69be3cf7970bbadb28c29c66e}{SPR\_\-IBAT0U}~( 528)
\item 
\#define \hyperlink{bootmii__ppc_8h_adad50c55f409adb983996ee4820781ac}{SPR\_\-IBAT0L}~( 529)
\item 
\#define \hyperlink{bootmii__ppc_8h_a5a0f0199659083e8cbccd5ab460f395d}{SPR\_\-IBAT1U}~( 530)
\item 
\#define \hyperlink{bootmii__ppc_8h_afb073265443f303f9f718d84fa06d5bb}{SPR\_\-IBAT1L}~( 531)
\item 
\#define \hyperlink{bootmii__ppc_8h_abcc6ebdffc4e6eeca14ddd11dcd02549}{SPR\_\-IBAT2U}~( 532)
\item 
\#define \hyperlink{bootmii__ppc_8h_afe61063aa7563fd280f81a88f7c24ecc}{SPR\_\-IBAT2L}~( 533)
\item 
\#define \hyperlink{bootmii__ppc_8h_a80ee4cf84c1a91e1d0c6b59590644874}{SPR\_\-IBAT3U}~( 534)
\item 
\#define \hyperlink{bootmii__ppc_8h_a5ade00abd4d012e60929c437ae5a3562}{SPR\_\-IBAT3L}~( 535)
\item 
\#define \hyperlink{bootmii__ppc_8h_ac6eefbba86752906bee60d9b3d87cf11}{SPR\_\-DBAT0U}~( 536)
\item 
\#define \hyperlink{bootmii__ppc_8h_a71a2874f7440c160ba2b7c1ff50dc943}{SPR\_\-DBAT0L}~( 537)
\item 
\#define \hyperlink{bootmii__ppc_8h_ac691a80bad4ddb9fa5082d5c7f37f60a}{SPR\_\-DBAT1U}~( 538)
\item 
\#define \hyperlink{bootmii__ppc_8h_a60e96c5e08a64d841855fc5b48557c52}{SPR\_\-DBAT1L}~( 539)
\item 
\#define \hyperlink{bootmii__ppc_8h_ab8265ea60a09d1ba10962cc5df49f47d}{SPR\_\-DBAT2U}~( 540)
\item 
\#define \hyperlink{bootmii__ppc_8h_a66359d58dfcd185f9c52b0fdb9cb57a9}{SPR\_\-DBAT2L}~( 541)
\item 
\#define \hyperlink{bootmii__ppc_8h_a9a53755345149939a61721cb5eb08f01}{SPR\_\-DBAT3U}~( 542)
\item 
\#define \hyperlink{bootmii__ppc_8h_ab5908c7a039f2c51c91441cc3c2ed7cf}{SPR\_\-DBAT3L}~( 543)
\item 
\#define \hyperlink{bootmii__ppc_8h_a5d104a7f6832876fdd175a1a517a4c9e}{SPR\_\-GQR0}~( 912)
\item 
\#define \hyperlink{bootmii__ppc_8h_aa8b977d3dcd7d3277daae8673db4c520}{SPR\_\-GQR1}~( 913)
\item 
\#define \hyperlink{bootmii__ppc_8h_a018965558376dedb9c3683db16e4e465}{SPR\_\-GQR2}~( 914)
\item 
\#define \hyperlink{bootmii__ppc_8h_aca62e6963124d4a406d67badda408ebe}{SPR\_\-GQR3}~( 915)
\item 
\#define \hyperlink{bootmii__ppc_8h_a84d636b6c51d414bfa4e60eccb3b0324}{SPR\_\-GQR4}~( 916)
\item 
\#define \hyperlink{bootmii__ppc_8h_aa31af16d11a76e4e0dd7cbcf8841c596}{SPR\_\-GQR5}~( 917)
\item 
\#define \hyperlink{bootmii__ppc_8h_a03f347d1756e22abc0ca044cba75fb67}{SPR\_\-GQR6}~( 918)
\item 
\#define \hyperlink{bootmii__ppc_8h_aa7abf8e5b6bf54f13a0b158fb7ff2cb9}{SPR\_\-GQR7}~( 919)
\item 
\#define \hyperlink{bootmii__ppc_8h_a1a4496dfada1a8bd0f5d5e14fb7093fd}{SPR\_\-HID2}~( 920)
\item 
\#define \hyperlink{bootmii__ppc_8h_a39d795c85361f1e76a30a6512c2c5fd0}{SPR\_\-WPAR}~( 921)
\item 
\#define \hyperlink{bootmii__ppc_8h_a7d082eb404d979f5d6aa15dc98fb1cd1}{SPR\_\-DMA\_\-U}~( 922)
\item 
\#define \hyperlink{bootmii__ppc_8h_a882f3df71c57a364b171f8c70c3c6093}{SPR\_\-DMA\_\-L}~( 923)
\item 
\#define \hyperlink{bootmii__ppc_8h_ac87f7671d35066db0ce3d24c2b786d64}{SPR\_\-UMMCR0}~( 936)
\item 
\#define \hyperlink{bootmii__ppc_8h_ad7f0fbd6326b4ff1cf6869cf97f22665}{SPR\_\-UPMC1}~( 937)
\item 
\#define \hyperlink{bootmii__ppc_8h_a8a9af40d41f95989b41a6b15c195164c}{SPR\_\-UPMC2}~( 938)
\item 
\#define \hyperlink{bootmii__ppc_8h_a2c689d2b9ab3a5a01ded19ffc908b576}{SPR\_\-USIA}~( 939)
\item 
\#define \hyperlink{bootmii__ppc_8h_a7192caed7c6fa325511f403b1e134f3d}{SPR\_\-UMMCR1}~( 940)
\item 
\#define \hyperlink{bootmii__ppc_8h_abc65225bc9bd94a423964009fbe4dfbf}{SPR\_\-UPMC3}~( 941)
\item 
\#define \hyperlink{bootmii__ppc_8h_a4ed16180e8ad03fa066ca00a0aae1c4c}{SPR\_\-UPMC4}~( 942)
\item 
\#define \hyperlink{bootmii__ppc_8h_a110fd98b21658c63bb129b766ae121dd}{SPR\_\-USDA}~( 943)
\item 
\#define \hyperlink{bootmii__ppc_8h_af64041d038441c171be5635bb7acb927}{SPR\_\-MMCR0}~( 952)
\item 
\#define \hyperlink{bootmii__ppc_8h_a3b0937c8879209b00da2148a1a9e9249}{SPR\_\-PMC1}~( 953)
\item 
\#define \hyperlink{bootmii__ppc_8h_a59307ee85e6bc2d9b87f12457b4717ac}{SPR\_\-PMC2}~( 954)
\item 
\#define \hyperlink{bootmii__ppc_8h_aba01de5270328e1d7aa0d715f1e34997}{SPR\_\-SIA}~( 955)
\item 
\#define \hyperlink{bootmii__ppc_8h_a297b8293d96a11c0453efe672f5affbe}{SPR\_\-MMCR1}~( 956)
\item 
\#define \hyperlink{bootmii__ppc_8h_a5ce856b8daddadeeba1923ba8e1ed313}{SPR\_\-PMC3}~( 957)
\item 
\#define \hyperlink{bootmii__ppc_8h_a8c0ba3f9698846734acd57cef2d87906}{SPR\_\-PMC4}~( 958)
\item 
\#define \hyperlink{bootmii__ppc_8h_a6d4fdaa6b21818db641d570ad2698059}{SPR\_\-SDA}~( 959)
\item 
\#define \hyperlink{bootmii__ppc_8h_a119ca9795445dffe67e11597ecbb9d91}{SPR\_\-HID0}~(1008)
\item 
\#define \hyperlink{bootmii__ppc_8h_a2c969de10fd0314f005dae763f165bba}{SPR\_\-HID1}~(1009)
\item 
\#define \hyperlink{bootmii__ppc_8h_a16b1167d9f69f7299dea8a8d544b205b}{SPR\_\-IABR}~(1010)
\item 
\#define \hyperlink{bootmii__ppc_8h_aa35d3a7eb015bd50e57de2fe56a2779f}{SPR\_\-HID4}~(1011)
\item 
\#define \hyperlink{bootmii__ppc_8h_ab0c45bc51b379007a68a5a6df3b3a596}{SPR\_\-DABR}~(1013)
\item 
\#define \hyperlink{bootmii__ppc_8h_ae31a96cf96aa2331645236027322c66b}{SPR\_\-L2CR}~(1017)
\item 
\#define \hyperlink{bootmii__ppc_8h_a5a9c8dbf6b71e448bb2640fa4889e843}{SPR\_\-ICTC}~(1019)
\item 
\#define \hyperlink{bootmii__ppc_8h_a6e5a52ff4cdf1731ac87734176202f91}{SPR\_\-THRM1}~(1020)
\item 
\#define \hyperlink{bootmii__ppc_8h_afeac838a5fda06e526502c0737672be6}{SPR\_\-THRM2}~(1021)
\item 
\#define \hyperlink{bootmii__ppc_8h_a842f68ed6b3fffd8f7d23df1593ab297}{SPR\_\-THRM3}~(1022)
\item 
\#define \hyperlink{bootmii__ppc_8h_a617455b2be2e7480103b6413a4e04693}{MEM2\_\-BSS}~\_\-\_\-attribute\_\-\_\- ((section (\char`\"{}.bss.mem2\char`\"{})))
\item 
\#define \hyperlink{bootmii__ppc_8h_ae2700aabc7922d981b8d35efb0f78d2b}{MEM2\_\-DATA}~\_\-\_\-attribute\_\-\_\- ((section (\char`\"{}.data.mem2\char`\"{})))
\item 
\#define \hyperlink{bootmii__ppc_8h_ae1f109cdd2dcf0856f85906d8d1d8e3d}{MEM2\_\-RODATA}~\_\-\_\-attribute\_\-\_\- ((section (\char`\"{}.rodata.mem2\char`\"{})))
\item 
\hypertarget{bootmii__ppc_8h_a8e7a3bf6003d72a62606f343c2db6245}{
\#define {\bfseries ALIGNED}(x)~\_\-\_\-attribute\_\-\_\- ((aligned(x)))}
\label{bootmii__ppc_8h_a8e7a3bf6003d72a62606f343c2db6245}

\item 
\#define \hyperlink{bootmii__ppc_8h_ab954e11541bc13c1286b4c819fe81f65}{STACK\_\-ALIGN}(type, name, cnt, alignment)
\begin{DoxyCompactList}\small\item\em Creates an array on the stack. \item\end{DoxyCompactList}\item 
\#define \hyperlink{bootmii__ppc_8h_a32debfd0b2b1a911166adec5d3987f38}{VIRT\_\-TO\_\-PHYS}(x)~((u32)(x) \& 0x3FFFFFFF)
\item 
\#define \hyperlink{bootmii__ppc_8h_a6f5e4a17b8f2dd1f1ce38a5cd0ca1af0}{PHYS\_\-TO\_\-VIRT}(x)~((u32)(x) $|$ 0x80000000)
\item 
\#define \hyperlink{bootmii__ppc_8h_a869922ee900e3f2fd8ab4aba94c9cc34}{PHYS\_\-TO\_\-VIRT\_\-NOCACHE}(x)~((u32)(x) $|$ 0xC0000000)
\item 
\#define \hyperlink{bootmii__ppc_8h_a5d0669915a56fc311e41044286db891c}{usleep}(n)~udelay(n)
\item 
\#define \hyperlink{bootmii__ppc_8h_a5def95360c06cdaa7e01de707261f32f}{mftb}()~getticks()
\item 
\#define \hyperlink{bootmii__ppc_8h_acd77bf97515461680623dfa781287181}{mtspr}(n, x)~asm(\char`\"{}mtspr \%1,\%0\char`\"{} : : \char`\"{}r\char`\"{}(x), \char`\"{}i\char`\"{}(n))
\begin{DoxyCompactList}\small\item\em Moves a value into an SPR. \item\end{DoxyCompactList}\item 
\#define \hyperlink{bootmii__ppc_8h_a28754240089f3ba101430c86c6eb0115}{mfspr}(n)
\begin{DoxyCompactList}\small\item\em Gets the value of an SPR. \item\end{DoxyCompactList}\item 
\#define \hyperlink{bootmii__ppc_8h_a0b954d24382efb3ed4ff9d571185adb1}{reboot}()~write32(HW\_\-RESETS, 0)
\item 
\#define \hyperlink{bootmii__ppc_8h_ae06e1942b2b0051a47ff7bc312696c48}{hollywood\_\-version}()~((read32(HW\_\-VERSION) $>$$>$ 4) \& 0xF)
\item 
\#define \hyperlink{bootmii__ppc_8h_af90ba8d491504b0a349ee17b6ad7d927}{hollywood\_\-revision}()~((read32(HW\_\-VERSION) $>$$>$ 0) \& 0xF)
\end{DoxyCompactItemize}
\subsection*{Typedefs}
\begin{DoxyCompactItemize}
\item 
\hypertarget{bootmii__ppc_8h_a3531b3ea3698892e1f63a2931158cf99}{
typedef void($\ast$ \hyperlink{bootmii__ppc_8h_a3531b3ea3698892e1f63a2931158cf99}{except\_\-handler} )(int exception)}
\label{bootmii__ppc_8h_a3531b3ea3698892e1f63a2931158cf99}

\begin{DoxyCompactList}\small\item\em Exception handler type. \item\end{DoxyCompactList}\end{DoxyCompactItemize}
\subsection*{Functions}
\begin{DoxyCompactItemize}
\item 
void \hyperlink{bootmii__ppc_8h_a1d17cbebb28a2c01e88a2ecd94896362}{sync\_\-before\_\-read} (void $\ast$p, u32 len)
\begin{DoxyCompactList}\small\item\em Invalidates the cache for the data. \item\end{DoxyCompactList}\item 
void \hyperlink{bootmii__ppc_8h_a517eb7854c10fdded52825fa8a2aadab}{flush\_\-after\_\-write} (void $\ast$p, u32 len)
\begin{DoxyCompactList}\small\item\em Flushes the cache for the data. \item\end{DoxyCompactList}\item 
void \hyperlink{bootmii__ppc_8h_a6e97cdbb7c2db6bcd9a549b948467c5d}{sync\_\-after\_\-write} (const void $\ast$p, u32 len)
\begin{DoxyCompactList}\small\item\em Stores the cache for the data. \item\end{DoxyCompactList}\item 
void \hyperlink{bootmii__ppc_8h_a235a374bb74642ff48d27e95997eb0b6}{sync\_\-before\_\-exec} (const void $\ast$p, u32 len)
\begin{DoxyCompactList}\small\item\em Stores the cache for the data and invalidates the instructions. \item\end{DoxyCompactList}\item 
\hypertarget{bootmii__ppc_8h_a99e2c169fcc4f0891b864796b574d7b5}{
void \hyperlink{bootmii__ppc_8h_a99e2c169fcc4f0891b864796b574d7b5}{ppcsync} (void)}
\label{bootmii__ppc_8h_a99e2c169fcc4f0891b864796b574d7b5}

\begin{DoxyCompactList}\small\item\em Synchronizes the data and instruction caches. \item\end{DoxyCompactList}\item 
void \hyperlink{bootmii__ppc_8h_ab2780d77dc40aad6d616fb3d7f8f9e84}{udelay} (u32 us)
\begin{DoxyCompactList}\small\item\em Delay with microsecond granularity. \item\end{DoxyCompactList}\item 
u64 \hyperlink{bootmii__ppc_8h_aaf8fa97bab5e05f3c5c5fece55451fd7}{getticks} ()
\begin{DoxyCompactList}\small\item\em Get processor ticks since power-\/on. \item\end{DoxyCompactList}\item 
void \hyperlink{bootmii__ppc_8h_a80533a25d6fd422bc12fa59ca53004dd}{tickdelay} (u64 ticks)
\begin{DoxyCompactList}\small\item\em Delay with processor tick granularity. \item\end{DoxyCompactList}\item 
\hypertarget{bootmii__ppc_8h_a9dda131d124b9968825742beac31305d}{
void \hyperlink{bootmii__ppc_8h_a9dda131d124b9968825742beac31305d}{exception\_\-init} (void)}
\label{bootmii__ppc_8h_a9dda131d124b9968825742beac31305d}

\begin{DoxyCompactList}\small\item\em Initializes exceptions. \item\end{DoxyCompactList}\end{DoxyCompactItemize}
\subsection*{Variables}
\begin{DoxyCompactItemize}
\item 
volatile \hyperlink{bootmii__ppc_8h_a3531b3ea3698892e1f63a2931158cf99}{except\_\-handler} \hyperlink{bootmii__ppc_8h_a7860220ee7d1eb7299c7142e63aaaff1}{exception\_\-handler\_\-table} \mbox{[}0x10\mbox{]}
\end{DoxyCompactItemize}


\subsection{Detailed Description}
All the SPRs for Broadway, and several PowerPC specific functions. 

\subsection{Define Documentation}
\hypertarget{bootmii__ppc_8h_af90ba8d491504b0a349ee17b6ad7d927}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!hollywood\_\-revision@{hollywood\_\-revision}}
\index{hollywood\_\-revision@{hollywood\_\-revision}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{hollywood\_\-revision}]{\setlength{\rightskip}{0pt plus 5cm}\#define hollywood\_\-revision()~((read32(HW\_\-VERSION) $>$$>$ 0) \& 0xF)}}
\label{bootmii__ppc_8h_af90ba8d491504b0a349ee17b6ad7d927}
Get the revision of the Hollywood \hypertarget{bootmii__ppc_8h_ae06e1942b2b0051a47ff7bc312696c48}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!hollywood\_\-version@{hollywood\_\-version}}
\index{hollywood\_\-version@{hollywood\_\-version}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{hollywood\_\-version}]{\setlength{\rightskip}{0pt plus 5cm}\#define hollywood\_\-version()~((read32(HW\_\-VERSION) $>$$>$ 4) \& 0xF)}}
\label{bootmii__ppc_8h_ae06e1942b2b0051a47ff7bc312696c48}
Get the version of the Hollywood \hypertarget{bootmii__ppc_8h_a617455b2be2e7480103b6413a4e04693}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!MEM2\_\-BSS@{MEM2\_\-BSS}}
\index{MEM2\_\-BSS@{MEM2\_\-BSS}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{MEM2\_\-BSS}]{\setlength{\rightskip}{0pt plus 5cm}\#define MEM2\_\-BSS~\_\-\_\-attribute\_\-\_\- ((section (\char`\"{}.bss.mem2\char`\"{})))}}
\label{bootmii__ppc_8h_a617455b2be2e7480103b6413a4e04693}
Puts some data into the MEM2 .bss section \hypertarget{bootmii__ppc_8h_ae2700aabc7922d981b8d35efb0f78d2b}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!MEM2\_\-DATA@{MEM2\_\-DATA}}
\index{MEM2\_\-DATA@{MEM2\_\-DATA}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{MEM2\_\-DATA}]{\setlength{\rightskip}{0pt plus 5cm}\#define MEM2\_\-DATA~\_\-\_\-attribute\_\-\_\- ((section (\char`\"{}.data.mem2\char`\"{})))}}
\label{bootmii__ppc_8h_ae2700aabc7922d981b8d35efb0f78d2b}
Puts some data into the MEM2 .data section \hypertarget{bootmii__ppc_8h_ae1f109cdd2dcf0856f85906d8d1d8e3d}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!MEM2\_\-RODATA@{MEM2\_\-RODATA}}
\index{MEM2\_\-RODATA@{MEM2\_\-RODATA}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{MEM2\_\-RODATA}]{\setlength{\rightskip}{0pt plus 5cm}\#define MEM2\_\-RODATA~\_\-\_\-attribute\_\-\_\- ((section (\char`\"{}.rodata.mem2\char`\"{})))}}
\label{bootmii__ppc_8h_ae1f109cdd2dcf0856f85906d8d1d8e3d}
Puts some data into the MEM2 .rodata section \hypertarget{bootmii__ppc_8h_a28754240089f3ba101430c86c6eb0115}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!mfspr@{mfspr}}
\index{mfspr@{mfspr}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{mfspr}]{\setlength{\rightskip}{0pt plus 5cm}\#define mfspr(n)}}
\label{bootmii__ppc_8h_a28754240089f3ba101430c86c6eb0115}
{\bfseries Value:}
\begin{DoxyCode}
({ \
        u32 x; asm volatile("mfspr %0,%1" : "=r"(x) : "i"(n)); x; \
})
\end{DoxyCode}


Gets the value of an SPR. 


\begin{DoxyParams}{Parameters}
\item[{\em n}]the SPR. \end{DoxyParams}
\begin{DoxyReturn}{Returns}
The value of the SPR. 
\end{DoxyReturn}
\begin{DoxySeeAlso}{See also}
\hyperlink{bootmii__ppc_8h_a28754240089f3ba101430c86c6eb0115}{mfspr()} 
\end{DoxySeeAlso}
\hypertarget{bootmii__ppc_8h_a5def95360c06cdaa7e01de707261f32f}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!mftb@{mftb}}
\index{mftb@{mftb}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{mftb}]{\setlength{\rightskip}{0pt plus 5cm}\#define mftb()~getticks()}}
\label{bootmii__ppc_8h_a5def95360c06cdaa7e01de707261f32f}
Renaming for processor terms \hypertarget{bootmii__ppc_8h_acd77bf97515461680623dfa781287181}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!mtspr@{mtspr}}
\index{mtspr@{mtspr}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{mtspr}]{\setlength{\rightskip}{0pt plus 5cm}\#define mtspr(n, \/  x)~asm(\char`\"{}mtspr \%1,\%0\char`\"{} : : \char`\"{}r\char`\"{}(x), \char`\"{}i\char`\"{}(n))}}
\label{bootmii__ppc_8h_acd77bf97515461680623dfa781287181}


Moves a value into an SPR. 


\begin{DoxyParams}{Parameters}
\item[{\em n}]the SPR. \item[{\em x}]the value to be put into the SPR. \end{DoxyParams}
\begin{DoxySeeAlso}{See also}
\hyperlink{bootmii__ppc_8h_a28754240089f3ba101430c86c6eb0115}{mfspr()} 
\end{DoxySeeAlso}
\hypertarget{bootmii__ppc_8h_a6f5e4a17b8f2dd1f1ce38a5cd0ca1af0}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!PHYS\_\-TO\_\-VIRT@{PHYS\_\-TO\_\-VIRT}}
\index{PHYS\_\-TO\_\-VIRT@{PHYS\_\-TO\_\-VIRT}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{PHYS\_\-TO\_\-VIRT}]{\setlength{\rightskip}{0pt plus 5cm}\#define PHYS\_\-TO\_\-VIRT(x)~((u32)(x) $|$ 0x80000000)}}
\label{bootmii__ppc_8h_a6f5e4a17b8f2dd1f1ce38a5cd0ca1af0}
Converts physical addresses to cached virtual \hypertarget{bootmii__ppc_8h_a869922ee900e3f2fd8ab4aba94c9cc34}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!PHYS\_\-TO\_\-VIRT\_\-NOCACHE@{PHYS\_\-TO\_\-VIRT\_\-NOCACHE}}
\index{PHYS\_\-TO\_\-VIRT\_\-NOCACHE@{PHYS\_\-TO\_\-VIRT\_\-NOCACHE}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{PHYS\_\-TO\_\-VIRT\_\-NOCACHE}]{\setlength{\rightskip}{0pt plus 5cm}\#define PHYS\_\-TO\_\-VIRT\_\-NOCACHE(x)~((u32)(x) $|$ 0xC0000000)}}
\label{bootmii__ppc_8h_a869922ee900e3f2fd8ab4aba94c9cc34}
Converts physical addresses to uncached virtual \hypertarget{bootmii__ppc_8h_a0b954d24382efb3ed4ff9d571185adb1}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!reboot@{reboot}}
\index{reboot@{reboot}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{reboot}]{\setlength{\rightskip}{0pt plus 5cm}\#define reboot()~write32(HW\_\-RESETS, 0)}}
\label{bootmii__ppc_8h_a0b954d24382efb3ed4ff9d571185adb1}
Reboot the system \hypertarget{bootmii__ppc_8h_a6d7d2d46fe4e0941bfab8a564d9f2566}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-CTR@{SPR\_\-CTR}}
\index{SPR\_\-CTR@{SPR\_\-CTR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-CTR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-CTR~(   9)}}
\label{bootmii__ppc_8h_a6d7d2d46fe4e0941bfab8a564d9f2566}
Count Register \hypertarget{bootmii__ppc_8h_ab0c45bc51b379007a68a5a6df3b3a596}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DABR@{SPR\_\-DABR}}
\index{SPR\_\-DABR@{SPR\_\-DABR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DABR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DABR~(1013)}}
\label{bootmii__ppc_8h_ab0c45bc51b379007a68a5a6df3b3a596}
Data Address Breakpoint Register \hypertarget{bootmii__ppc_8h_a964470f48d20463ccf068ead18685bf1}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DAR@{SPR\_\-DAR}}
\index{SPR\_\-DAR@{SPR\_\-DAR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DAR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DAR~(  19)}}
\label{bootmii__ppc_8h_a964470f48d20463ccf068ead18685bf1}
Data Address Register \hypertarget{bootmii__ppc_8h_a71a2874f7440c160ba2b7c1ff50dc943}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DBAT0L@{SPR\_\-DBAT0L}}
\index{SPR\_\-DBAT0L@{SPR\_\-DBAT0L}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DBAT0L}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DBAT0L~( 537)}}
\label{bootmii__ppc_8h_a71a2874f7440c160ba2b7c1ff50dc943}
Data Block-\/address Translation Lower Register 0 \hypertarget{bootmii__ppc_8h_ac6eefbba86752906bee60d9b3d87cf11}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DBAT0U@{SPR\_\-DBAT0U}}
\index{SPR\_\-DBAT0U@{SPR\_\-DBAT0U}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DBAT0U}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DBAT0U~( 536)}}
\label{bootmii__ppc_8h_ac6eefbba86752906bee60d9b3d87cf11}
Data Block-\/address Translation Upper Register 0 \hypertarget{bootmii__ppc_8h_a60e96c5e08a64d841855fc5b48557c52}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DBAT1L@{SPR\_\-DBAT1L}}
\index{SPR\_\-DBAT1L@{SPR\_\-DBAT1L}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DBAT1L}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DBAT1L~( 539)}}
\label{bootmii__ppc_8h_a60e96c5e08a64d841855fc5b48557c52}
Data Block-\/address Translation Lower Register 1 \hypertarget{bootmii__ppc_8h_ac691a80bad4ddb9fa5082d5c7f37f60a}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DBAT1U@{SPR\_\-DBAT1U}}
\index{SPR\_\-DBAT1U@{SPR\_\-DBAT1U}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DBAT1U}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DBAT1U~( 538)}}
\label{bootmii__ppc_8h_ac691a80bad4ddb9fa5082d5c7f37f60a}
Data Block-\/address Translation Upper Register 1 \hypertarget{bootmii__ppc_8h_a66359d58dfcd185f9c52b0fdb9cb57a9}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DBAT2L@{SPR\_\-DBAT2L}}
\index{SPR\_\-DBAT2L@{SPR\_\-DBAT2L}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DBAT2L}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DBAT2L~( 541)}}
\label{bootmii__ppc_8h_a66359d58dfcd185f9c52b0fdb9cb57a9}
Data Block-\/address Translation Lower Register 2 \hypertarget{bootmii__ppc_8h_ab8265ea60a09d1ba10962cc5df49f47d}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DBAT2U@{SPR\_\-DBAT2U}}
\index{SPR\_\-DBAT2U@{SPR\_\-DBAT2U}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DBAT2U}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DBAT2U~( 540)}}
\label{bootmii__ppc_8h_ab8265ea60a09d1ba10962cc5df49f47d}
Data Block-\/address Translation Upper Register 2 \hypertarget{bootmii__ppc_8h_ab5908c7a039f2c51c91441cc3c2ed7cf}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DBAT3L@{SPR\_\-DBAT3L}}
\index{SPR\_\-DBAT3L@{SPR\_\-DBAT3L}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DBAT3L}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DBAT3L~( 543)}}
\label{bootmii__ppc_8h_ab5908c7a039f2c51c91441cc3c2ed7cf}
Data Block-\/address Translation Lower Register 3 \hypertarget{bootmii__ppc_8h_a9a53755345149939a61721cb5eb08f01}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DBAT3U@{SPR\_\-DBAT3U}}
\index{SPR\_\-DBAT3U@{SPR\_\-DBAT3U}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DBAT3U}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DBAT3U~( 542)}}
\label{bootmii__ppc_8h_a9a53755345149939a61721cb5eb08f01}
Data Block-\/address Translation Upper Register 3 \hypertarget{bootmii__ppc_8h_af34fb74c3d2b383fe13de8bbc1c33848}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DEC@{SPR\_\-DEC}}
\index{SPR\_\-DEC@{SPR\_\-DEC}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DEC}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DEC~(  22)}}
\label{bootmii__ppc_8h_af34fb74c3d2b383fe13de8bbc1c33848}
Decrementer Register \hypertarget{bootmii__ppc_8h_a882f3df71c57a364b171f8c70c3c6093}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DMA\_\-L@{SPR\_\-DMA\_\-L}}
\index{SPR\_\-DMA\_\-L@{SPR\_\-DMA\_\-L}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DMA\_\-L}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DMA\_\-L~( 923)}}
\label{bootmii__ppc_8h_a882f3df71c57a364b171f8c70c3c6093}
Direct Memory Access Lower Register \hypertarget{bootmii__ppc_8h_a7d082eb404d979f5d6aa15dc98fb1cd1}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DMA\_\-U@{SPR\_\-DMA\_\-U}}
\index{SPR\_\-DMA\_\-U@{SPR\_\-DMA\_\-U}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DMA\_\-U}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DMA\_\-U~( 922)}}
\label{bootmii__ppc_8h_a7d082eb404d979f5d6aa15dc98fb1cd1}
Direct Memory Access Upper Register \hypertarget{bootmii__ppc_8h_a527a5a627634c14e323477261c7ef331}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-DSISR@{SPR\_\-DSISR}}
\index{SPR\_\-DSISR@{SPR\_\-DSISR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-DSISR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-DSISR~(  18)}}
\label{bootmii__ppc_8h_a527a5a627634c14e323477261c7ef331}
DSI Exception Cause Register \hypertarget{bootmii__ppc_8h_a39106933d6f7bdbca6823ac34317eef9}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-EAR@{SPR\_\-EAR}}
\index{SPR\_\-EAR@{SPR\_\-EAR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-EAR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-EAR~( 282)}}
\label{bootmii__ppc_8h_a39106933d6f7bdbca6823ac34317eef9}
External Access Register \hypertarget{bootmii__ppc_8h_a5d104a7f6832876fdd175a1a517a4c9e}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-GQR0@{SPR\_\-GQR0}}
\index{SPR\_\-GQR0@{SPR\_\-GQR0}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-GQR0}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-GQR0~( 912)}}
\label{bootmii__ppc_8h_a5d104a7f6832876fdd175a1a517a4c9e}
Graphics Quantization Register 0 \hypertarget{bootmii__ppc_8h_aa8b977d3dcd7d3277daae8673db4c520}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-GQR1@{SPR\_\-GQR1}}
\index{SPR\_\-GQR1@{SPR\_\-GQR1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-GQR1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-GQR1~( 913)}}
\label{bootmii__ppc_8h_aa8b977d3dcd7d3277daae8673db4c520}
Graphics Quantization Register 1 \hypertarget{bootmii__ppc_8h_a018965558376dedb9c3683db16e4e465}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-GQR2@{SPR\_\-GQR2}}
\index{SPR\_\-GQR2@{SPR\_\-GQR2}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-GQR2}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-GQR2~( 914)}}
\label{bootmii__ppc_8h_a018965558376dedb9c3683db16e4e465}
Graphics Quantization Register 2 \hypertarget{bootmii__ppc_8h_aca62e6963124d4a406d67badda408ebe}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-GQR3@{SPR\_\-GQR3}}
\index{SPR\_\-GQR3@{SPR\_\-GQR3}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-GQR3}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-GQR3~( 915)}}
\label{bootmii__ppc_8h_aca62e6963124d4a406d67badda408ebe}
Graphics Quantization Register 3 \hypertarget{bootmii__ppc_8h_a84d636b6c51d414bfa4e60eccb3b0324}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-GQR4@{SPR\_\-GQR4}}
\index{SPR\_\-GQR4@{SPR\_\-GQR4}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-GQR4}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-GQR4~( 916)}}
\label{bootmii__ppc_8h_a84d636b6c51d414bfa4e60eccb3b0324}
Graphics Quantization Register 4 \hypertarget{bootmii__ppc_8h_aa31af16d11a76e4e0dd7cbcf8841c596}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-GQR5@{SPR\_\-GQR5}}
\index{SPR\_\-GQR5@{SPR\_\-GQR5}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-GQR5}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-GQR5~( 917)}}
\label{bootmii__ppc_8h_aa31af16d11a76e4e0dd7cbcf8841c596}
Graphics Quantization Register 5 \hypertarget{bootmii__ppc_8h_a03f347d1756e22abc0ca044cba75fb67}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-GQR6@{SPR\_\-GQR6}}
\index{SPR\_\-GQR6@{SPR\_\-GQR6}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-GQR6}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-GQR6~( 918)}}
\label{bootmii__ppc_8h_a03f347d1756e22abc0ca044cba75fb67}
Graphics Quantization Register 6 \hypertarget{bootmii__ppc_8h_aa7abf8e5b6bf54f13a0b158fb7ff2cb9}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-GQR7@{SPR\_\-GQR7}}
\index{SPR\_\-GQR7@{SPR\_\-GQR7}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-GQR7}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-GQR7~( 919)}}
\label{bootmii__ppc_8h_aa7abf8e5b6bf54f13a0b158fb7ff2cb9}
Graphics Quantization Register 7 \hypertarget{bootmii__ppc_8h_a119ca9795445dffe67e11597ecbb9d91}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-HID0@{SPR\_\-HID0}}
\index{SPR\_\-HID0@{SPR\_\-HID0}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-HID0}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-HID0~(1008)}}
\label{bootmii__ppc_8h_a119ca9795445dffe67e11597ecbb9d91}
Hardware Implementation-\/Dependant Register 0 \hypertarget{bootmii__ppc_8h_a2c969de10fd0314f005dae763f165bba}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-HID1@{SPR\_\-HID1}}
\index{SPR\_\-HID1@{SPR\_\-HID1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-HID1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-HID1~(1009)}}
\label{bootmii__ppc_8h_a2c969de10fd0314f005dae763f165bba}
Hardware Implementation-\/Dependant Register 1 \hypertarget{bootmii__ppc_8h_a1a4496dfada1a8bd0f5d5e14fb7093fd}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-HID2@{SPR\_\-HID2}}
\index{SPR\_\-HID2@{SPR\_\-HID2}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-HID2}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-HID2~( 920)}}
\label{bootmii__ppc_8h_a1a4496dfada1a8bd0f5d5e14fb7093fd}
Hardware Implementation-\/Dependant Register 2 \hypertarget{bootmii__ppc_8h_aa35d3a7eb015bd50e57de2fe56a2779f}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-HID4@{SPR\_\-HID4}}
\index{SPR\_\-HID4@{SPR\_\-HID4}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-HID4}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-HID4~(1011)}}
\label{bootmii__ppc_8h_aa35d3a7eb015bd50e57de2fe56a2779f}
Hardware Implementation-\/Dependant Register 4 \hypertarget{bootmii__ppc_8h_a16b1167d9f69f7299dea8a8d544b205b}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-IABR@{SPR\_\-IABR}}
\index{SPR\_\-IABR@{SPR\_\-IABR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-IABR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-IABR~(1010)}}
\label{bootmii__ppc_8h_a16b1167d9f69f7299dea8a8d544b205b}
Instruction Address Breakpoint Register \hypertarget{bootmii__ppc_8h_adad50c55f409adb983996ee4820781ac}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-IBAT0L@{SPR\_\-IBAT0L}}
\index{SPR\_\-IBAT0L@{SPR\_\-IBAT0L}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-IBAT0L}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-IBAT0L~( 529)}}
\label{bootmii__ppc_8h_adad50c55f409adb983996ee4820781ac}
Instruction Block-\/address Translation Lower Register 0 \hypertarget{bootmii__ppc_8h_a5ca31be69be3cf7970bbadb28c29c66e}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-IBAT0U@{SPR\_\-IBAT0U}}
\index{SPR\_\-IBAT0U@{SPR\_\-IBAT0U}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-IBAT0U}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-IBAT0U~( 528)}}
\label{bootmii__ppc_8h_a5ca31be69be3cf7970bbadb28c29c66e}
Instruction Block-\/address Translation Upper Register 0 \hypertarget{bootmii__ppc_8h_afb073265443f303f9f718d84fa06d5bb}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-IBAT1L@{SPR\_\-IBAT1L}}
\index{SPR\_\-IBAT1L@{SPR\_\-IBAT1L}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-IBAT1L}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-IBAT1L~( 531)}}
\label{bootmii__ppc_8h_afb073265443f303f9f718d84fa06d5bb}
Instruction Block-\/address Translation Lower Register 1 \hypertarget{bootmii__ppc_8h_a5a0f0199659083e8cbccd5ab460f395d}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-IBAT1U@{SPR\_\-IBAT1U}}
\index{SPR\_\-IBAT1U@{SPR\_\-IBAT1U}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-IBAT1U}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-IBAT1U~( 530)}}
\label{bootmii__ppc_8h_a5a0f0199659083e8cbccd5ab460f395d}
Instruction Block-\/address Translation Upper Register 1 \hypertarget{bootmii__ppc_8h_afe61063aa7563fd280f81a88f7c24ecc}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-IBAT2L@{SPR\_\-IBAT2L}}
\index{SPR\_\-IBAT2L@{SPR\_\-IBAT2L}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-IBAT2L}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-IBAT2L~( 533)}}
\label{bootmii__ppc_8h_afe61063aa7563fd280f81a88f7c24ecc}
Instruction Block-\/address Translation Lower Register 2 \hypertarget{bootmii__ppc_8h_abcc6ebdffc4e6eeca14ddd11dcd02549}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-IBAT2U@{SPR\_\-IBAT2U}}
\index{SPR\_\-IBAT2U@{SPR\_\-IBAT2U}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-IBAT2U}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-IBAT2U~( 532)}}
\label{bootmii__ppc_8h_abcc6ebdffc4e6eeca14ddd11dcd02549}
Instruction Block-\/address Translation Upper Register 2 \hypertarget{bootmii__ppc_8h_a5ade00abd4d012e60929c437ae5a3562}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-IBAT3L@{SPR\_\-IBAT3L}}
\index{SPR\_\-IBAT3L@{SPR\_\-IBAT3L}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-IBAT3L}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-IBAT3L~( 535)}}
\label{bootmii__ppc_8h_a5ade00abd4d012e60929c437ae5a3562}
Instruction Block-\/address Translation Lower Register 3 \hypertarget{bootmii__ppc_8h_a80ee4cf84c1a91e1d0c6b59590644874}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-IBAT3U@{SPR\_\-IBAT3U}}
\index{SPR\_\-IBAT3U@{SPR\_\-IBAT3U}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-IBAT3U}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-IBAT3U~( 534)}}
\label{bootmii__ppc_8h_a80ee4cf84c1a91e1d0c6b59590644874}
Instruction Block-\/address Translation Upper Register 3 \hypertarget{bootmii__ppc_8h_a5a9c8dbf6b71e448bb2640fa4889e843}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-ICTC@{SPR\_\-ICTC}}
\index{SPR\_\-ICTC@{SPR\_\-ICTC}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-ICTC}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-ICTC~(1019)}}
\label{bootmii__ppc_8h_a5a9c8dbf6b71e448bb2640fa4889e843}
Instruction Cache Throttling Control Register \hypertarget{bootmii__ppc_8h_ae31a96cf96aa2331645236027322c66b}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-L2CR@{SPR\_\-L2CR}}
\index{SPR\_\-L2CR@{SPR\_\-L2CR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-L2CR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-L2CR~(1017)}}
\label{bootmii__ppc_8h_ae31a96cf96aa2331645236027322c66b}
L2 Cache Control Register \hypertarget{bootmii__ppc_8h_a10bf9d4046b46400ba8aa504ad7aa871}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-LR@{SPR\_\-LR}}
\index{SPR\_\-LR@{SPR\_\-LR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-LR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-LR~(   8)}}
\label{bootmii__ppc_8h_a10bf9d4046b46400ba8aa504ad7aa871}
Link Register \hypertarget{bootmii__ppc_8h_af64041d038441c171be5635bb7acb927}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-MMCR0@{SPR\_\-MMCR0}}
\index{SPR\_\-MMCR0@{SPR\_\-MMCR0}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-MMCR0}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-MMCR0~( 952)}}
\label{bootmii__ppc_8h_af64041d038441c171be5635bb7acb927}
Monitor Mode Control Register 0 \hypertarget{bootmii__ppc_8h_a297b8293d96a11c0453efe672f5affbe}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-MMCR1@{SPR\_\-MMCR1}}
\index{SPR\_\-MMCR1@{SPR\_\-MMCR1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-MMCR1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-MMCR1~( 956)}}
\label{bootmii__ppc_8h_a297b8293d96a11c0453efe672f5affbe}
Monitor Mode Control Register 1 \hypertarget{bootmii__ppc_8h_a3b0937c8879209b00da2148a1a9e9249}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-PMC1@{SPR\_\-PMC1}}
\index{SPR\_\-PMC1@{SPR\_\-PMC1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-PMC1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-PMC1~( 953)}}
\label{bootmii__ppc_8h_a3b0937c8879209b00da2148a1a9e9249}
Performance Monitor Count Register 1 \hypertarget{bootmii__ppc_8h_a59307ee85e6bc2d9b87f12457b4717ac}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-PMC2@{SPR\_\-PMC2}}
\index{SPR\_\-PMC2@{SPR\_\-PMC2}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-PMC2}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-PMC2~( 954)}}
\label{bootmii__ppc_8h_a59307ee85e6bc2d9b87f12457b4717ac}
Performance Monitor Count Register 2 \hypertarget{bootmii__ppc_8h_a5ce856b8daddadeeba1923ba8e1ed313}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-PMC3@{SPR\_\-PMC3}}
\index{SPR\_\-PMC3@{SPR\_\-PMC3}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-PMC3}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-PMC3~( 957)}}
\label{bootmii__ppc_8h_a5ce856b8daddadeeba1923ba8e1ed313}
Performance Monitor Count Register 3 \hypertarget{bootmii__ppc_8h_a8c0ba3f9698846734acd57cef2d87906}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-PMC4@{SPR\_\-PMC4}}
\index{SPR\_\-PMC4@{SPR\_\-PMC4}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-PMC4}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-PMC4~( 958)}}
\label{bootmii__ppc_8h_a8c0ba3f9698846734acd57cef2d87906}
Performance Monitor Count Register 4 \hypertarget{bootmii__ppc_8h_a912adaaf5ab1a3522222100703a3af79}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-PVR@{SPR\_\-PVR}}
\index{SPR\_\-PVR@{SPR\_\-PVR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-PVR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-PVR~( 287)}}
\label{bootmii__ppc_8h_a912adaaf5ab1a3522222100703a3af79}
Processor Version Register \hypertarget{bootmii__ppc_8h_a6d4fdaa6b21818db641d570ad2698059}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-SDA@{SPR\_\-SDA}}
\index{SPR\_\-SDA@{SPR\_\-SDA}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-SDA}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-SDA~( 959)}}
\label{bootmii__ppc_8h_a6d4fdaa6b21818db641d570ad2698059}
Sampled Data Address Register \hypertarget{bootmii__ppc_8h_a64587e05c3cb39548ea847bdada55185}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-SDR1@{SPR\_\-SDR1}}
\index{SPR\_\-SDR1@{SPR\_\-SDR1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-SDR1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-SDR1~(  25)}}
\label{bootmii__ppc_8h_a64587e05c3cb39548ea847bdada55185}
Page Table base address \hypertarget{bootmii__ppc_8h_aba01de5270328e1d7aa0d715f1e34997}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-SIA@{SPR\_\-SIA}}
\index{SPR\_\-SIA@{SPR\_\-SIA}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-SIA}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-SIA~( 955)}}
\label{bootmii__ppc_8h_aba01de5270328e1d7aa0d715f1e34997}
Sampled Instruction Address Register \hypertarget{bootmii__ppc_8h_a3a37b0e6f0780ef16c808f289b0ee327}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-SPRG0@{SPR\_\-SPRG0}}
\index{SPR\_\-SPRG0@{SPR\_\-SPRG0}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-SPRG0}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-SPRG0~( 272)}}
\label{bootmii__ppc_8h_a3a37b0e6f0780ef16c808f289b0ee327}
OS reserved \hypertarget{bootmii__ppc_8h_ab09d01f2ff163655bf4bc0dbfa1d3b57}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-SPRG1@{SPR\_\-SPRG1}}
\index{SPR\_\-SPRG1@{SPR\_\-SPRG1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-SPRG1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-SPRG1~( 273)}}
\label{bootmii__ppc_8h_ab09d01f2ff163655bf4bc0dbfa1d3b57}
OS reserved \hypertarget{bootmii__ppc_8h_a2ee8d624883e3d16596982a65993281b}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-SPRG2@{SPR\_\-SPRG2}}
\index{SPR\_\-SPRG2@{SPR\_\-SPRG2}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-SPRG2}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-SPRG2~( 274)}}
\label{bootmii__ppc_8h_a2ee8d624883e3d16596982a65993281b}
OS reserved \hypertarget{bootmii__ppc_8h_ac6c12814914d9f2568a221ff7b6db9fc}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-SPRG3@{SPR\_\-SPRG3}}
\index{SPR\_\-SPRG3@{SPR\_\-SPRG3}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-SPRG3}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-SPRG3~( 275)}}
\label{bootmii__ppc_8h_ac6c12814914d9f2568a221ff7b6db9fc}
OS reserved \hypertarget{bootmii__ppc_8h_a1c57abb6957f8fd75ba94c8207f04598}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-SRR0@{SPR\_\-SRR0}}
\index{SPR\_\-SRR0@{SPR\_\-SRR0}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-SRR0}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-SRR0~(  26)}}
\label{bootmii__ppc_8h_a1c57abb6957f8fd75ba94c8207f04598}
Save/Restore Register 0 \hypertarget{bootmii__ppc_8h_a9ee4c5d5e9f008dbf134e83da290822c}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-SRR1@{SPR\_\-SRR1}}
\index{SPR\_\-SRR1@{SPR\_\-SRR1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-SRR1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-SRR1~(  27)}}
\label{bootmii__ppc_8h_a9ee4c5d5e9f008dbf134e83da290822c}
Save/Restore Register 1 \hypertarget{bootmii__ppc_8h_a6e5a52ff4cdf1731ac87734176202f91}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-THRM1@{SPR\_\-THRM1}}
\index{SPR\_\-THRM1@{SPR\_\-THRM1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-THRM1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-THRM1~(1020)}}
\label{bootmii__ppc_8h_a6e5a52ff4cdf1731ac87734176202f91}
Thermal Management Register 1 \hypertarget{bootmii__ppc_8h_afeac838a5fda06e526502c0737672be6}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-THRM2@{SPR\_\-THRM2}}
\index{SPR\_\-THRM2@{SPR\_\-THRM2}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-THRM2}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-THRM2~(1021)}}
\label{bootmii__ppc_8h_afeac838a5fda06e526502c0737672be6}
Thermal Management Register 2 \hypertarget{bootmii__ppc_8h_a842f68ed6b3fffd8f7d23df1593ab297}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-THRM3@{SPR\_\-THRM3}}
\index{SPR\_\-THRM3@{SPR\_\-THRM3}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-THRM3}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-THRM3~(1022)}}
\label{bootmii__ppc_8h_a842f68ed6b3fffd8f7d23df1593ab297}
Thermal Management Register 3 \hypertarget{bootmii__ppc_8h_ac87f7671d35066db0ce3d24c2b786d64}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-UMMCR0@{SPR\_\-UMMCR0}}
\index{SPR\_\-UMMCR0@{SPR\_\-UMMCR0}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-UMMCR0}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-UMMCR0~( 936)}}
\label{bootmii__ppc_8h_ac87f7671d35066db0ce3d24c2b786d64}
User Monitor Mode Control Register 0 \hypertarget{bootmii__ppc_8h_a7192caed7c6fa325511f403b1e134f3d}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-UMMCR1@{SPR\_\-UMMCR1}}
\index{SPR\_\-UMMCR1@{SPR\_\-UMMCR1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-UMMCR1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-UMMCR1~( 940)}}
\label{bootmii__ppc_8h_a7192caed7c6fa325511f403b1e134f3d}
User Monitor Mode Control Register 0 \hypertarget{bootmii__ppc_8h_ad7f0fbd6326b4ff1cf6869cf97f22665}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-UPMC1@{SPR\_\-UPMC1}}
\index{SPR\_\-UPMC1@{SPR\_\-UPMC1}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-UPMC1}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-UPMC1~( 937)}}
\label{bootmii__ppc_8h_ad7f0fbd6326b4ff1cf6869cf97f22665}
User Performance Monitor Count Register 1 \hypertarget{bootmii__ppc_8h_a8a9af40d41f95989b41a6b15c195164c}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-UPMC2@{SPR\_\-UPMC2}}
\index{SPR\_\-UPMC2@{SPR\_\-UPMC2}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-UPMC2}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-UPMC2~( 938)}}
\label{bootmii__ppc_8h_a8a9af40d41f95989b41a6b15c195164c}
User Performance Monitor Count Register 2 \hypertarget{bootmii__ppc_8h_abc65225bc9bd94a423964009fbe4dfbf}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-UPMC3@{SPR\_\-UPMC3}}
\index{SPR\_\-UPMC3@{SPR\_\-UPMC3}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-UPMC3}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-UPMC3~( 941)}}
\label{bootmii__ppc_8h_abc65225bc9bd94a423964009fbe4dfbf}
User Performance Monitor Count Register 3 \hypertarget{bootmii__ppc_8h_a4ed16180e8ad03fa066ca00a0aae1c4c}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-UPMC4@{SPR\_\-UPMC4}}
\index{SPR\_\-UPMC4@{SPR\_\-UPMC4}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-UPMC4}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-UPMC4~( 942)}}
\label{bootmii__ppc_8h_a4ed16180e8ad03fa066ca00a0aae1c4c}
User Performance Monitor Count Register 4 \hypertarget{bootmii__ppc_8h_a110fd98b21658c63bb129b766ae121dd}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-USDA@{SPR\_\-USDA}}
\index{SPR\_\-USDA@{SPR\_\-USDA}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-USDA}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-USDA~( 943)}}
\label{bootmii__ppc_8h_a110fd98b21658c63bb129b766ae121dd}
User Sampled Data Address Register \hypertarget{bootmii__ppc_8h_a2c689d2b9ab3a5a01ded19ffc908b576}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-USIA@{SPR\_\-USIA}}
\index{SPR\_\-USIA@{SPR\_\-USIA}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-USIA}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-USIA~( 939)}}
\label{bootmii__ppc_8h_a2c689d2b9ab3a5a01ded19ffc908b576}
User Sampled Instruction Address Register \hypertarget{bootmii__ppc_8h_a39d795c85361f1e76a30a6512c2c5fd0}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-WPAR@{SPR\_\-WPAR}}
\index{SPR\_\-WPAR@{SPR\_\-WPAR}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-WPAR}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-WPAR~( 921)}}
\label{bootmii__ppc_8h_a39d795c85361f1e76a30a6512c2c5fd0}
Write Pipe Address Register \hypertarget{bootmii__ppc_8h_ac86d7bbf6141f9d7d6632d260a2ed64d}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!SPR\_\-XER@{SPR\_\-XER}}
\index{SPR\_\-XER@{SPR\_\-XER}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{SPR\_\-XER}]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR\_\-XER~(   1)}}
\label{bootmii__ppc_8h_ac86d7bbf6141f9d7d6632d260a2ed64d}
Integer Exception Register \hypertarget{bootmii__ppc_8h_ab954e11541bc13c1286b4c819fe81f65}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!STACK\_\-ALIGN@{STACK\_\-ALIGN}}
\index{STACK\_\-ALIGN@{STACK\_\-ALIGN}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{STACK\_\-ALIGN}]{\setlength{\rightskip}{0pt plus 5cm}\#define STACK\_\-ALIGN(type, \/  name, \/  cnt, \/  alignment)}}
\label{bootmii__ppc_8h_ab954e11541bc13c1286b4c819fe81f65}
{\bfseries Value:}
\begin{DoxyCode}
u8 _al__##name[((sizeof(type)*(cnt)) + (alignment) + \
        (((sizeof(type)*(cnt))%(alignment)) > 0 ? ((alignment) - \
        ((sizeof(type)*(cnt))%(alignment))) : 0))]; \
        type *name = (type*)(((u32)(_al__##name)) + ((alignment) - (( \
        (u32)(_al__##name))&((alignment)-1))))
\end{DoxyCode}


Creates an array on the stack. 

Uhh... 
\begin{DoxyParams}{Parameters}
\item[{\em type}]the type of array to be created. \item[{\em name}]the name of the array to be created. \item[{\em cnt}]how many \char`\"{}type\char`\"{}s to allocate. \item[{\em alignment}]how many bytes to align the array to. \end{DoxyParams}
\hypertarget{bootmii__ppc_8h_a5d0669915a56fc311e41044286db891c}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!usleep@{usleep}}
\index{usleep@{usleep}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{usleep}]{\setlength{\rightskip}{0pt plus 5cm}\#define usleep(n)~udelay(n)}}
\label{bootmii__ppc_8h_a5d0669915a56fc311e41044286db891c}
Renaming for compatibility \hypertarget{bootmii__ppc_8h_a32debfd0b2b1a911166adec5d3987f38}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!VIRT\_\-TO\_\-PHYS@{VIRT\_\-TO\_\-PHYS}}
\index{VIRT\_\-TO\_\-PHYS@{VIRT\_\-TO\_\-PHYS}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{VIRT\_\-TO\_\-PHYS}]{\setlength{\rightskip}{0pt plus 5cm}\#define VIRT\_\-TO\_\-PHYS(x)~((u32)(x) \& 0x3FFFFFFF)}}
\label{bootmii__ppc_8h_a32debfd0b2b1a911166adec5d3987f38}
Converts virtual addresses to physical 

\subsection{Function Documentation}
\hypertarget{bootmii__ppc_8h_a517eb7854c10fdded52825fa8a2aadab}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!flush\_\-after\_\-write@{flush\_\-after\_\-write}}
\index{flush\_\-after\_\-write@{flush\_\-after\_\-write}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{flush\_\-after\_\-write}]{\setlength{\rightskip}{0pt plus 5cm}void flush\_\-after\_\-write (void $\ast$ {\em p}, \/  u32 {\em len})}}
\label{bootmii__ppc_8h_a517eb7854c10fdded52825fa8a2aadab}


Flushes the cache for the data. 


\begin{DoxyParams}{Parameters}
\item[{\em p}]the start of the memory that was written. \item[{\em len}]how far the cache needs to be flushed. \end{DoxyParams}
\hypertarget{bootmii__ppc_8h_aaf8fa97bab5e05f3c5c5fece55451fd7}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!getticks@{getticks}}
\index{getticks@{getticks}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{getticks}]{\setlength{\rightskip}{0pt plus 5cm}u64 getticks ()}}
\label{bootmii__ppc_8h_aaf8fa97bab5e05f3c5c5fece55451fd7}


Get processor ticks since power-\/on. 

\begin{DoxyReturn}{Returns}
How many processor ticks have elapsed since power-\/on. 
\end{DoxyReturn}
\hypertarget{bootmii__ppc_8h_a6e97cdbb7c2db6bcd9a549b948467c5d}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!sync\_\-after\_\-write@{sync\_\-after\_\-write}}
\index{sync\_\-after\_\-write@{sync\_\-after\_\-write}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{sync\_\-after\_\-write}]{\setlength{\rightskip}{0pt plus 5cm}void sync\_\-after\_\-write (const void $\ast$ {\em p}, \/  u32 {\em len})}}
\label{bootmii__ppc_8h_a6e97cdbb7c2db6bcd9a549b948467c5d}


Stores the cache for the data. 


\begin{DoxyParams}{Parameters}
\item[{\em p}]the start of the memory that was written. \item[{\em len}]how far the cache needs to be stored. \end{DoxyParams}
\hypertarget{bootmii__ppc_8h_a235a374bb74642ff48d27e95997eb0b6}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!sync\_\-before\_\-exec@{sync\_\-before\_\-exec}}
\index{sync\_\-before\_\-exec@{sync\_\-before\_\-exec}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{sync\_\-before\_\-exec}]{\setlength{\rightskip}{0pt plus 5cm}void sync\_\-before\_\-exec (const void $\ast$ {\em p}, \/  u32 {\em len})}}
\label{bootmii__ppc_8h_a235a374bb74642ff48d27e95997eb0b6}


Stores the cache for the data and invalidates the instructions. 


\begin{DoxyParams}{Parameters}
\item[{\em p}]the start of the memory that is to be executed. \item[{\em len}]how far the cache needs to be stored and invalidated. \end{DoxyParams}
\hypertarget{bootmii__ppc_8h_a1d17cbebb28a2c01e88a2ecd94896362}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!sync\_\-before\_\-read@{sync\_\-before\_\-read}}
\index{sync\_\-before\_\-read@{sync\_\-before\_\-read}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{sync\_\-before\_\-read}]{\setlength{\rightskip}{0pt plus 5cm}void sync\_\-before\_\-read (void $\ast$ {\em p}, \/  u32 {\em len})}}
\label{bootmii__ppc_8h_a1d17cbebb28a2c01e88a2ecd94896362}


Invalidates the cache for the data. 


\begin{DoxyParams}{Parameters}
\item[{\em p}]the start of the memory to be read. \item[{\em len}]how far the cache needs to be invalidated. \end{DoxyParams}
\hypertarget{bootmii__ppc_8h_a80533a25d6fd422bc12fa59ca53004dd}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!tickdelay@{tickdelay}}
\index{tickdelay@{tickdelay}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{tickdelay}]{\setlength{\rightskip}{0pt plus 5cm}void tickdelay (u64 {\em ticks})}}
\label{bootmii__ppc_8h_a80533a25d6fd422bc12fa59ca53004dd}


Delay with processor tick granularity. 


\begin{DoxyParams}{Parameters}
\item[{\em ticks}]how many processor ticks to wait. \end{DoxyParams}
\hypertarget{bootmii__ppc_8h_ab2780d77dc40aad6d616fb3d7f8f9e84}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!udelay@{udelay}}
\index{udelay@{udelay}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{udelay}]{\setlength{\rightskip}{0pt plus 5cm}void udelay (u32 {\em us})}}
\label{bootmii__ppc_8h_ab2780d77dc40aad6d616fb3d7f8f9e84}


Delay with microsecond granularity. 


\begin{DoxyParams}{Parameters}
\item[{\em us}]how many microseconds to delay. \end{DoxyParams}


\subsection{Variable Documentation}
\hypertarget{bootmii__ppc_8h_a7860220ee7d1eb7299c7142e63aaaff1}{
\index{bootmii\_\-ppc.h@{bootmii\_\-ppc.h}!exception\_\-handler\_\-table@{exception\_\-handler\_\-table}}
\index{exception\_\-handler\_\-table@{exception\_\-handler\_\-table}!bootmii_ppc.h@{bootmii\_\-ppc.h}}
\subsubsection[{exception\_\-handler\_\-table}]{\setlength{\rightskip}{0pt plus 5cm}volatile {\bf except\_\-handler} {\bf exception\_\-handler\_\-table}\mbox{[}0x10\mbox{]}}}
\label{bootmii__ppc_8h_a7860220ee7d1eb7299c7142e63aaaff1}
Exception handler table 