HuC6273 (Aurora)

Table of Contents

IO Ports
Registers
FIFO commands

I/O Ports

0x80500000FIFO
0x80500004FIFO control
0x80500006Command macro bank select
0x80500008Command macro start address
0x8050000ACommand macro length
0x8050000CInterrupt mask
0x8050000EInterrupt clear
0x80500010Interrupt status
0x80500012Readback
0x80500014H timing
0x80500016V timing
0x80500018SCT address
0x8050001ASprite control
0x8050001CCD result 0
0x8050001ECD result 1
0x80500020SP window clip Xleft
0x80500022SP window clip Ytop
0x80500024SP window clip Xright
0x80500026SP window clip Ybottom
0x80500028Misc. status
0x8050002AError status
0x8050002CDisplay control
0x8050002EStatus control
0x80500030TextureEngine code control
0x80500032TextureEngine address control
0x8050003CRaster hit
0x80500040PixelEngine test
0x80500042Memory test
0x80500060Results[0]
0x80500062Results[1]
0x80500064Results[2]
0x80500066Results[3]
0x80500068Results[4]
0x8050006AResults[5]
0x8050006CResults[6]
0x8050006EResults[7]
0x80500070Results[8]
0x80500072Results[9]
0x80500074Results[10]
0x80500076Results[11]
0x80500078Results[12]
0x8050007AResults[13]
0x8050007CResults[14]
0x8050007EResults[15]
0x80510000Command macro/Texture buffer

Register

0x80500000   FIFO (Word/Half)

When written, pushes data to the FIFO. Can be written as a word or a halfword.

See the FIFO section for command info

When read, contains the FIFO slots remaining in hwords (mask out the top byte).

0x80500004   FIFO control (Half)

FIFO control

BitsDescription
?

0x80500006   Command macro bank select (Half)

Command macro bank selection. Bottom 5 bits are valid.

0x80500008   Command macro start address (Half)

Command macro start address

0x8050000A   Command macro length (Half)

Command macro length

0x8050000C   Interrupt mask (Half)

Aurora interrupts mask.

BitsDescription
1Frame sync
2Overflow
3Almost full
4Command sync error
5Almost empty
6PixelEngine sync
7Command macro done
8Sprite done
9TextureEngine sync
10Readback done
11VSync
12HSync
13VBlank
14HBlank
15Raster hit

0x8050000E   Interrupt clear (Half)

Aurora interrupt clearing. Same mask as 0x8050000C

0x80500010   Interrupt status (Half)

Aurora interrupt status. Same mask as 0x80500010

0x80500012   Readback (Half)

Stores data to be pushed back out. All writes here stay here.

0x80500014   Horizontal timing (Half)

Horizontal timing

Top 9 bits are the start HBlank location, and the bottom 7 are the end of HBlank

0x80500016   Vertical timing (Half)

Vertical timing

Top 9 bits are the start VBlank location, and the bottom 7 are the end of VBlank

0x80500018   SCT address (Half)

Sprite control table (?) address information

BitsDescription
0 ~ 2Top 3 bits of SCT number
3 ~ 7Sprite bank select
8 ~ 10Top 3 bits of SCT word count

0x8050001A   Sprite control (Half)

Sprite controls. Write here initiates sprite drawing.

BitsDescription
0 ~ 7SCT word count
8 ~ 15SCT offset

0x8050001C   CD result 0 (Half)

CD result 0 (?)

BitsDescription
0 ~ 3Result mask 0
4 ~ 7Result mask 1
8 ~ 11Result mask 2
12 ~ 15Result mask 3

0x8050001E   CD result 1 (Half)

CD result 1 (?)

BitsDescription
0 ~ 3Result mask 0
4 ~ 7Result mask 1
8 ~ 11Result mask 2
12 ~ 15Result mask 3

0x80500020   SP window clip Xleft (Half)

X coordinate of the top-left corner of the clipping window. (9 bit)

0x80500022   SP window clip Ytop (Half)

Y coordinate of the top-left corner of the clipping window. (8 bit)

0x80500024   SP window clip Xright (Half)

X coordinate of the bottom-right corner of the clipping window. (9 bit)

0x80500026   SP window clip Ybottom (Half)

Y coordinate of the bottom-right corner of the clipping window. (8 bit)

0x80500028   Misc. status (Half)

Miscellaneous status bits.

BitsDescription
0No termination word
3PixelEngine busy
4TextureEngine busy
5Sprite busy
6Memory busy
7Rotozoomer busy
8Command macro pending
9VSync
10VBlank
11Buffer clear busy
12Command macro busy
13Force ghost
14Ghost disable
15VDP select (?)

0x8050002A   Error status (Half)

Error status bits.

BitsDescription
0 ~ 3TextureEngine status
4 ~ 7PixelEngine status
8 ~ 11Sprite error code

0x8050002C   Display control (Half)

Display controls

BitsDescription
0 ~ 6Frame sync count
7Hidden clear enable
8Autoswap mode
9 ~ 10Buffer clear mode
11Display to texture copy
13 ~ 15Select VD11

0x8050002E   Status control (Half)

Status controls

Write
BitsDescription
0Soft reset
1Hard reset
Read
BitsDescription
0 ~ 3Chip revision
8 ~ 9Texture buffer size
10Texture buffer width

0x80500030   TextureEngine code control (Half)

TextureEngine code controls

BitsDescription
0TextureEngine hold (?)
3TextureEngine flip register file

0x80500032   TextureEngine address control (Half)

TextureEngine address controls

More info needed!

0x8050003C   Raster Hit (Half? [possibly Word])

More info needed!

0x80500040   PixelEngine test (Half)

More info needed!

0x80500042   Memory test (Half)

More info needed!

0x80500060   Results[0] (Half)

Matrix operation results halfword 0

0x80500062   Results[1] (Half)

Matrix operation results halfword 1

0x80500064   Results[2] (Half)

Matrix operation results halfword 2

0x80500066   Results[3] (Half)

Matrix operation results halfword 3

0x80500068   Results[4] (Half)

Matrix operation results halfword 4

0x8050006A   Results[5] (Half)

Matrix operation results halfword 5

0x8050006C   Results[6] (Half)

Matrix operation results halfword 6

0x8050006E   Results[7] (Half)

Matrix operation results halfword 7

0x80500070   Results[8] (Half)

Matrix operation results halfword 8

0x80500072   Results[9] (Half)

Matrix operation results halfword 9

0x80500074   Results[10] (Half)

Matrix operation results halfword 10

0x80500076   Results[11] (Half)

Matrix operation results halfword 11

0x80500078   Results[12] (Half)

Matrix operation results halfword 12

0x8050007A   Results[13] (Half)

Matrix operation results halfword 13

0x8050007C   Results[14] (Half)

Matrix operation results halfword 14

0x8050007E   Results[15] (Half)

Matrix operation results halfword 15

0x80510000   Command macro/Texture buffer

Command macro and Texture buffer location

FIFO commands

Due to the sheer size of this section, it is split onto a second page

[TOP]