bootmii_ppc.h

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/*
        libbroadway - A general purpose library to control the Wii.
        PowerPC helper functions

Copyright (C) 2008              Segher Boessenkool <segher@kernel.crashing.org>
Copyright (C) 2010              Alex Marshall <trap15@raidenii.net>

# This code is licensed to you under the terms of the GNU GPL, version 2;
# see file COPYING or http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
*/

#ifndef __BOOTMII_PPC_H__
#define __BOOTMII_PPC_H__

#include <types.h>
#include <broadway/hollywood.h>

/* Broadway SPRs */
#define SPR_XER         (   1)  
#define SPR_LR          (   8)  
#define SPR_CTR         (   9)  
#define SPR_DSISR       (  18)  
#define SPR_DAR         (  19)  
#define SPR_DEC         (  22)  
#define SPR_SDR1        (  25)  
#define SPR_SRR0        (  26)  
#define SPR_SRR1        (  27)  
#define SPR_SPRG0       ( 272)  
#define SPR_SPRG1       ( 273)  
#define SPR_SPRG2       ( 274)  
#define SPR_SPRG3       ( 275)  
#define SPR_EAR         ( 282)  
#define SPR_PVR         ( 287)  
#define SPR_IBAT0U      ( 528)  
#define SPR_IBAT0L      ( 529)  
#define SPR_IBAT1U      ( 530)  
#define SPR_IBAT1L      ( 531)  
#define SPR_IBAT2U      ( 532)  
#define SPR_IBAT2L      ( 533)  
#define SPR_IBAT3U      ( 534)  
#define SPR_IBAT3L      ( 535)  
#define SPR_DBAT0U      ( 536)  
#define SPR_DBAT0L      ( 537)  
#define SPR_DBAT1U      ( 538)  
#define SPR_DBAT1L      ( 539)  
#define SPR_DBAT2U      ( 540)  
#define SPR_DBAT2L      ( 541)  
#define SPR_DBAT3U      ( 542)  
#define SPR_DBAT3L      ( 543)  
#define SPR_GQR0        ( 912)  
#define SPR_GQR1        ( 913)  
#define SPR_GQR2        ( 914)  
#define SPR_GQR3        ( 915)  
#define SPR_GQR4        ( 916)  
#define SPR_GQR5        ( 917)  
#define SPR_GQR6        ( 918)  
#define SPR_GQR7        ( 919)  
#define SPR_HID2        ( 920)  
#define SPR_WPAR        ( 921)  
#define SPR_DMA_U       ( 922)  
#define SPR_DMA_L       ( 923)  
#define SPR_UMMCR0      ( 936)  
#define SPR_UPMC1       ( 937)  
#define SPR_UPMC2       ( 938)  
#define SPR_USIA        ( 939)  
#define SPR_UMMCR1      ( 940)  
#define SPR_UPMC3       ( 941)  
#define SPR_UPMC4       ( 942)  
#define SPR_USDA        ( 943)  
#define SPR_MMCR0       ( 952)  
#define SPR_PMC1        ( 953)  
#define SPR_PMC2        ( 954)  
#define SPR_SIA         ( 955)  
#define SPR_MMCR1       ( 956)  
#define SPR_PMC3        ( 957)  
#define SPR_PMC4        ( 958)  
#define SPR_SDA         ( 959)  
#define SPR_HID0        (1008)  
#define SPR_HID1        (1009)  
#define SPR_IABR        (1010)  
#define SPR_HID4        (1011)  
#define SPR_DABR        (1013)  
#define SPR_L2CR        (1017)  
#define SPR_ICTC        (1019)  
#define SPR_THRM1       (1020)  
#define SPR_THRM2       (1021)  
#define SPR_THRM3       (1022)  
#define MEM2_BSS        __attribute__ ((section (".bss.mem2")))         
#define MEM2_DATA       __attribute__ ((section (".data.mem2")))        
#define MEM2_RODATA     __attribute__ ((section (".rodata.mem2")))      
#define ALIGNED(x)      __attribute__ ((aligned(x)))

#define STACK_ALIGN(type, name, cnt, alignment)         \
        u8 _al__##name[((sizeof(type)*(cnt)) + (alignment) + \
        (((sizeof(type)*(cnt))%(alignment)) > 0 ? ((alignment) - \
        ((sizeof(type)*(cnt))%(alignment))) : 0))]; \
        type *name = (type*)(((u32)(_al__##name)) + ((alignment) - (( \
        (u32)(_al__##name))&((alignment)-1))))

#define VIRT_TO_PHYS(x)         ((u32)(x) & 0x3FFFFFFF) 
#define PHYS_TO_VIRT(x)         ((u32)(x) | 0x80000000) 
#define PHYS_TO_VIRT_NOCACHE(x) ((u32)(x) | 0xC0000000) 
/* Basic I/O. */

static inline u32 read32(u32 addr)
{
        u32 x;
        asm volatile("lwz %0,0(%1) ; sync" : "=r"(x) : "b"(PHYS_TO_VIRT_NOCACHE(addr)));
        return x;
}

static inline void write32(u32 addr, u32 x)
{
        asm("stw %0,0(%1) ; eieio" : : "r"(x), "b"(PHYS_TO_VIRT_NOCACHE(addr)));
}

static inline void set32(u32 addr, u32 set)
{
        write32(addr, read32(addr) | set);
}

static inline void clear32(u32 addr, u32 clear)
{
        write32(addr, read32(addr) & (~clear));
}

static inline void flip32(u32 addr, u32 flip)
{
        write32(addr, read32(addr) ^ flip);
}

static inline void mask32(u32 addr, u32 clear, u32 set)
{
        write32(addr, (read32(addr) & (~clear)) | set);
}

static inline u16 read16(u32 addr)
{
        u16 x;
        asm volatile("lhz %0,0(%1) ; sync" : "=r"(x) : "b"(PHYS_TO_VIRT_NOCACHE(addr)));
        return x;
}

static inline void write16(u32 addr, u16 x)
{
        asm("sth %0,0(%1) ; eieio" : : "r"(x), "b"(PHYS_TO_VIRT_NOCACHE(addr)));
}

static inline void set16(u32 addr, u16 set)
{
        write16(addr, read16(addr) | set);
}

static inline void clear16(u32 addr, u16 clear)
{
        write16(addr, read16(addr) & (~clear));
}

static inline void flip16(u32 addr, u16 flip)
{
        write16(addr, read16(addr) ^ flip);
}

static inline void mask16(u32 addr, u16 clear, u16 set)
{
        write16(addr, (read16(addr) & (~clear)) | set);
}

static inline u8 read8(u32 addr)
{
        u8 x;
        asm volatile("lbz %0,0(%1) ; sync" : "=r"(x) : "b"(PHYS_TO_VIRT_NOCACHE(addr)));
        return x;
}

static inline void write8(u32 addr, u8 x)
{
        asm("stb %0,0(%1) ; eieio" : : "r"(x), "b"(PHYS_TO_VIRT_NOCACHE(addr)));
}

static inline void set8(u32 addr, u8 set)
{
        write8(addr, read8(addr) | set);
}

static inline void clear8(u32 addr, u8 clear)
{
        write8(addr, read8(addr) & (~clear));
}

static inline void flip8(u32 addr, u8 flip)
{
        write8(addr, read8(addr) ^ flip);
}

static inline void mask8(u32 addr, u8 clear, u8 set)
{
        write8(addr, (read8(addr) & (~clear)) | set);
}

/* Address mapping. */
static inline u32 virt_to_phys(const void *p)
{
        return (u32)(VIRT_TO_PHYS(p));
}

static inline void *phys_to_virt(u32 x)
{
        return (void *)(PHYS_TO_VIRT(x));
}

static inline void *phys_to_virt_nocache(u32 x)
{
        return (void *)(PHYS_TO_VIRT_NOCACHE(x));
}

/* Cache synchronisation. */
void sync_before_read(void *p, u32 len);
void flush_after_write(void *p, u32 len);
void sync_after_write(const void *p, u32 len);
void sync_before_exec(const void *p, u32 len);
void ppcsync(void);

/* Time. */
void udelay(u32 us);
u64 getticks();
void tickdelay(u64 ticks);
#define usleep(n)       udelay(n)       
#define mftb()          getticks()      
/* Special purpose registers. */

#define mtspr(n, x) asm("mtspr %1,%0" : : "r"(x), "i"(n))

#define mfspr(n) ({ \
        u32 x; asm volatile("mfspr %0,%1" : "=r"(x) : "i"(n)); x; \
})

/* Exceptions. */
void exception_init(void);
typedef void (*except_handler)(int exception);
extern volatile except_handler exception_handler_table[0x10];

#define reboot()                write32(HW_RESETS, 0)

#define hollywood_version()     ((read32(HW_VERSION) >> 4) & 0xF)

#define hollywood_revision()    ((read32(HW_VERSION) >> 0) & 0xF)

static inline void doze_mode()
{
        u32 hid0;
        asm volatile("mfspr %0,1008" : "=r"(hid0));
        /* Disable sleep, nap and doze bits */
        hid0 &= ~(7 << 21);
        /* Enable doze bit */
        hid0 |= (1 << 23);
        asm volatile("mtspr 1008,%0" : : "r"(hid0));
}

static inline void nap_mode()
{
        /* HID0 */
        u32 hid0;
        asm volatile("mfspr %0,1008" : "=r"(hid0));
        /* Disable sleep, nap and doze bits */
        hid0 &= ~(7 << 21);
        /* Enable nap bit */
        hid0 |= (1 << 22);
        asm volatile("mtspr 1008,%0" : : "r"(hid0));
}

static inline void sleep_mode()
{
        /* HID0 */
        u32 hid0;
        asm volatile("mfspr %0,1008" : "=r"(hid0));
        /* Disable sleep, nap and doze bits */
        hid0 &= ~(7 << 21);
        /* Enable sleep bit */
        hid0 |= (1 << 21);
        asm volatile("mtspr 1008,%0" : : "r"(hid0));
}

static inline void power_save()
{
        /* Switch to power-save mode */
        asm volatile(
                "mfmsr  0               \n"
                "oris   0, 0, 0x80      \n"
                "sync                   \n"
                "mtmsr  0               \n"
                "isync                  \n"
                : : : "0");
}

#endif